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root/bsp/hal/x86/pc/clock.c/* [<][>][^][v][top][bottom][index][help] */DEFINITIONSThis source file includes following definitions.1 /*- 2 * Copyright (c) 2005-2007, Kohsuke Ohtani 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the author nor the names of any co-contributors 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 /* 31 * clock.c - clock driver for i8254. 32 */ 33 34 #include <kernel.h> 35 #include <timer.h> 36 #include <irq.h> 37 #include <sys/ipl.h> 38 #include <cpufunc.h> 39 40 /* Interrupt vector for clock */ 41 #define CLOCK_IRQ 0 42 43 /* The internal tick rate in ticks per second */ 44 #define PIT_TICK 1193180L 45 46 /* The latch count value for the current HZ setting */ 47 #define PIT_LATCH ((PIT_TICK + (HZ / 2)) / HZ) 48 49 /* I/O port for programmable interval timer */ 50 #define PIT_CH0 0x40 51 #define PIT_CTRL 0x43 52 53 /* 54 * Clock interrupt service routine. 55 * No H/W reprogram is required. 56 */ 57 static int 58 clock_isr(void *arg) 59 { 60 int s; 61 62 s = splhigh(); 63 timer_handler(); 64 splx(s); 65 66 return INT_DONE; 67 } 68 69 /* 70 * Initialize clock H/W chip. 71 * Setup clock tick rate and install clock ISR. 72 */ 73 void 74 clock_init(void) 75 { 76 irq_t clock_irq; 77 78 outb_p(PIT_CTRL, 0x34); /* Command to set generator mode */ 79 outb_p(PIT_CH0, (u_char)(PIT_LATCH & 0xff)); /* LSB */ 80 outb_p(PIT_CH0, (u_char)((PIT_LATCH >> 8) & 0xff)); /* MSB */ 81 82 clock_irq = irq_attach(CLOCK_IRQ, IPL_CLOCK, 0, &clock_isr, 83 IST_NONE, NULL); 84 85 DPRINTF(("Clock rate: %d ticks/sec\n", CONFIG_HZ)); 86 } /* [<][>][^][v][top][bottom][index][help] */ | |||
Copyright© 2005-2009 Kohsuke Ohtani |