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root/bsp/hal/x86/arch/cpufunc.S

DEFINITIONS

1. cpu_idle
2. flush_tlb
3. flush_cache
4. load_tr
5. load_gdt
6. load_idt
7. get_cr2
8. set_cr3
9. get_cr3
10. outb
11. inb
12. outb_p
13. inb_p

   1 /*-
   2  * Copyright (c) 2008, Kohsuke Ohtani
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  * 3. Neither the name of the author nor the names of any co-contributors
  14  *    may be used to endorse or promote products derived from this software
  15  *    without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27  * SUCH DAMAGE.
  28  */
  30 /*
  31  * cpufunc.S - Functions to provide access to i386 specific instructions.
  32  */
  34 #include <machine/asm.h>
  35 #include <cpu.h>
  37         .section ".text"
ENTRY(cpu_idle)
  40         sti
  41         hlt
  42         ret
ENTRY(flush_tlb)
  45         movl    %cr3, %eax
  46         movl    %eax, %cr3
  47         ret
ENTRY(flush_cache)
  50         wbinvd
  51         ret
ENTRY(load_tr)
  54         movl    4(%esp), %eax
  55         ltr     %ax
  56         ret
ENTRY(load_gdt)
  59         movl    4(%esp), %eax
  60         lgdt    (%eax)
  61         jmp     1f                      /* Flush the prefetch queue */
  62         nop
  63 1:
  64         movl    $(KERNEL_DS), %eax
  65         movl    %eax, %ds
  66         movl    %eax, %es
  67         movl    %eax, %fs
  68         movl    %eax, %gs
  69         movl    %eax, %ss
  70         movl    $(KERNEL_CS), %eax
  71         pushl   %eax
  72         pushl   $2f
  73         lret
  74 2:
  75         ret
ENTRY(load_idt)
  78         movl    4(%esp), %eax
  79         lidt    (%eax)
  80         ret
ENTRY(get_cr2)
  83         movl    %cr2, %eax
  84         ret
ENTRY(set_cr3)
  87         movl    4(%esp), %eax
  88         movl    %eax, %cr3
  89         ret
ENTRY(get_cr3)
  92         movl    %cr3, %eax
  93         ret
ENTRY(outb)
  96         movl    4(%esp), %edx
  97         movl    8(%esp), %eax
  98         outb    %al, %dx
  99         ret
ENTRY(inb)
 102         movl    4(%esp), %edx
 103         xorl    %eax, %eax
 104         inb     %dx, %al
 105         ret
ENTRY(outb_p)
 108         movl    4(%esp), %edx
 109         movl    8(%esp), %eax
 110         outb    %al, %dx
 111         outb    %al, $0x80
 112         ret
ENTRY(inb_p)
 115         movl    4(%esp), %edx
 116         xorl    %eax, %eax
 117         inb     %dx, %al
 118         outb    %al, $0x80
 119         ret