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root/bsp/hal/x86/include/context.h/* [<][>][^][v][top][bottom][index][help] */INCLUDED FROM1 /*- 2 * Copyright (c) 2005-2008, Kohsuke Ohtani 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the author nor the names of any co-contributors 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #ifndef _X86_CONTEXT_H 31 #define _X86_CONTEXT_H 32 33 #include <sys/types.h> 34 35 /* 36 * Common register frame for trap/interrupt. 37 * These cpu state are saved into top of the kernel stack in 38 * trap/interrupt entries. Since the arguments of system calls are 39 * passed via registers, the system call library is completely 40 * dependent on this register format. 41 * 42 * The value of ss & esp are not valid for kernel mode trap 43 * because these are set only when privilege level is changed. 44 */ 45 struct cpu_regs { 46 uint32_t ebx; /* +0 (00) --- s/w trap frame --- */ 47 uint32_t ecx; /* +4 (04) */ 48 uint32_t edx; /* +8 (08) */ 49 uint32_t esi; /* +12 (0C) */ 50 uint32_t eax; /* +16 (10) */ 51 uint32_t edi; /* +20 (14) */ 52 uint32_t ebp; /* +24 (18) */ 53 uint32_t ds; /* +28 (1C) */ 54 uint32_t es; /* +32 (20) */ 55 uint32_t trap_no; /* +36 (24) --- h/w trap frame --- */ 56 uint32_t err_code; /* +40 (28) */ 57 uint32_t eip; /* +44 (2C) */ 58 uint32_t cs; /* +48 (30) */ 59 uint32_t eflags; /* +52 (34) */ 60 uint32_t esp; /* +56 (38) */ 61 uint32_t ss; /* +60 (3C) */ 62 }; 63 64 /* 65 * Kernel mode context for context switching. 66 */ 67 struct kern_regs { 68 uint32_t eip; /* +0 (00) */ 69 uint32_t ebx; /* +4 (04) */ 70 uint32_t edi; /* +8 (08) */ 71 uint32_t esi; /* +12 (0C) */ 72 uint32_t ebp; /* +16 (10) */ 73 uint32_t esp; /* +20 (14) */ 74 }; 75 76 /* 77 * FPU register for fsave/frstor 78 */ 79 struct fpu_regs { 80 uint32_t ctrl_word; 81 uint32_t stat_word; 82 uint32_t tag_word; 83 uint32_t ip_offset; 84 uint32_t cs_sel; 85 uint32_t op_offset; 86 uint32_t op_sel; 87 uint32_t st[20]; 88 }; 89 90 /* 91 * Processor context 92 */ 93 struct context { 94 struct kern_regs kregs; /* kernel mode registers */ 95 struct cpu_regs *uregs; /* user mode registers */ 96 struct cpu_regs *saved_regs; /* saved user mode registers */ 97 #ifdef CONFIG_FPU 98 struct fpu_regs *fregs; /* co-processor registers */ 99 #endif 100 uint32_t esp0; /* top of kernel stack */ 101 }; 102 103 typedef struct context *context_t; /* context id */ 104 105 #endif /* !_X86_CONTEXT_H */ /* [<][>][^][v][top][bottom][index][help] */ | |||
Copyright© 2005-2009 Kohsuke Ohtani |