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root/bsp/hal/arm/gba/clock.c

DEFINITIONS

1. clock_isr
2. clock_init

   1 /*-
   2  * Copyright (c) 2005-2007, Kohsuke Ohtani
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  * 3. Neither the name of the author nor the names of any co-contributors
  14  *    may be used to endorse or promote products derived from this software
  15  *    without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27  * SUCH DAMAGE.
  28  */
  30 /*
  31  * clock.c - clock driver
  32  */
  34 #include <sys/ipl.h>
  35 #include <kernel.h>
  36 #include <timer.h>
  37 #include <irq.h>
  38 #include <cpufunc.h>
  41 /* Interrupt vector for timer (TMR0 of GBA) */
  42 #define CLOCK_IRQ       3
  44 /* The clock rate per second ... 2^24 */
  45 #define CLOCK_RATE      16777216L
  47 /* The initial counter value */
  48 #define TIMER_COUNT     (0xffff - (CLOCK_RATE / 64 / HZ))
  50 /* GBA timer registers */
  51 #define TMR0_COUNT      (*(volatile uint16_t *)0x4000100)
  52 #define TMR0_CTRL       (*(volatile uint16_t *)0x4000102)
  54 /* Timer frequency */
  55 #define TMR_1_CLOCK     0x0000
  56 #define TMR_64_CLOCK    0x0001
  57 #define TMR_256_CLOCK   0x0002
  58 #define TMR_1024_CLOCK  0x0003
  60 /* Cascade switch */
  61 #define TMR_CASCADE     0x0004
  63 /* Interrupt for overflow */
  64 #define TMR_IRQEN       0x0040
  66 /* Timer switch */
  67 #define TMR_EN          0x0080
  69 /*
  70  * Clock interrupt service routine.
  71  * No H/W reprogram is required.
  72  */
  73 static int
clock_isr(void *arg)
  75 {
splhigh();
timer_handler();
spl0();
  80         return INT_DONE;
  81 }
  83 /*
  84  * Initialize clock H/W chip.
  85  * Setup clock tick rate and install clock ISR.
  86  */
  87 void
clock_init(void)
  89 {
irq_t clock_irq;
  92         /* Setup counter value */
TMR0_COUNT = TIMER_COUNT;
TMR0_CTRL = (uint16_t)(TMR_IRQEN | TMR_64_CLOCK);
  96         /* Install ISR */
clock_irq = irq_attach(CLOCK_IRQ, IPL_CLOCK, 0, &clock_isr,
IST_NONE, NULL);
 100         /* Enable timer */
TMR0_CTRL |= TMR_EN;
 102 }