COM_BASE 40 bsp/boot/ppc/prep/debug.c #define COM_RBR (COM_BASE + 0x00) /* receive buffer register */ COM_BASE 41 bsp/boot/ppc/prep/debug.c #define COM_THR (COM_BASE + 0x00) /* transmit holding register */ COM_BASE 42 bsp/boot/ppc/prep/debug.c #define COM_IER (COM_BASE + 0x01) /* interrupt enable register */ COM_BASE 43 bsp/boot/ppc/prep/debug.c #define COM_FCR (COM_BASE + 0x02) /* FIFO control register */ COM_BASE 44 bsp/boot/ppc/prep/debug.c #define COM_IIR (COM_BASE + 0x02) /* interrupt identification register */ COM_BASE 45 bsp/boot/ppc/prep/debug.c #define COM_LCR (COM_BASE + 0x03) /* line control register */ COM_BASE 46 bsp/boot/ppc/prep/debug.c #define COM_MCR (COM_BASE + 0x04) /* modem control register */ COM_BASE 47 bsp/boot/ppc/prep/debug.c #define COM_LSR (COM_BASE + 0x05) /* line status register */ COM_BASE 48 bsp/boot/ppc/prep/debug.c #define COM_MSR (COM_BASE + 0x06) /* modem status register */ COM_BASE 49 bsp/boot/ppc/prep/debug.c #define COM_DLL (COM_BASE + 0x00) /* divisor latch LSB (LCR[7] = 1) */ COM_BASE 50 bsp/boot/ppc/prep/debug.c #define COM_DLM (COM_BASE + 0x01) /* divisor latch MSB (LCR[7] = 1) */ COM_BASE 42 bsp/boot/x86/pc/debug.c #define COM_RBR (COM_BASE + 0x00) /* receive buffer register */ COM_BASE 43 bsp/boot/x86/pc/debug.c #define COM_THR (COM_BASE + 0x00) /* transmit holding register */ COM_BASE 44 bsp/boot/x86/pc/debug.c #define COM_IER (COM_BASE + 0x01) /* interrupt enable register */ COM_BASE 45 bsp/boot/x86/pc/debug.c #define COM_FCR (COM_BASE + 0x02) /* FIFO control register */ COM_BASE 46 bsp/boot/x86/pc/debug.c #define COM_IIR (COM_BASE + 0x02) /* interrupt identification register */ COM_BASE 47 bsp/boot/x86/pc/debug.c #define COM_LCR (COM_BASE + 0x03) /* line control register */ COM_BASE 48 bsp/boot/x86/pc/debug.c #define COM_MCR (COM_BASE + 0x04) /* modem control register */ COM_BASE 49 bsp/boot/x86/pc/debug.c #define COM_LSR (COM_BASE + 0x05) /* line status register */ COM_BASE 50 bsp/boot/x86/pc/debug.c #define COM_MSR (COM_BASE + 0x06) /* modem status register */ COM_BASE 51 bsp/boot/x86/pc/debug.c #define COM_DLL (COM_BASE + 0x00) /* divisor latch LSB (LCR[7] = 1) */ COM_BASE 52 bsp/boot/x86/pc/debug.c #define COM_DLM (COM_BASE + 0x01) /* divisor latch MSB (LCR[7] = 1) */ COM_BASE 50 bsp/drv/dev/serial/ns16550.c #define COM_RBR (COM_BASE + 0x00) /* receive buffer register */ COM_BASE 51 bsp/drv/dev/serial/ns16550.c #define COM_THR (COM_BASE + 0x00) /* transmit holding register */ COM_BASE 52 bsp/drv/dev/serial/ns16550.c #define COM_IER (COM_BASE + 0x01) /* interrupt enable register */ COM_BASE 53 bsp/drv/dev/serial/ns16550.c #define COM_FCR (COM_BASE + 0x02) /* FIFO control register */ COM_BASE 54 bsp/drv/dev/serial/ns16550.c #define COM_IIR (COM_BASE + 0x02) /* interrupt identification register */ COM_BASE 55 bsp/drv/dev/serial/ns16550.c #define COM_LCR (COM_BASE + 0x03) /* line control register */ COM_BASE 56 bsp/drv/dev/serial/ns16550.c #define COM_MCR (COM_BASE + 0x04) /* modem control register */ COM_BASE 57 bsp/drv/dev/serial/ns16550.c #define COM_LSR (COM_BASE + 0x05) /* line status register */ COM_BASE 58 bsp/drv/dev/serial/ns16550.c #define COM_MSR (COM_BASE + 0x06) /* modem status register */ COM_BASE 59 bsp/drv/dev/serial/ns16550.c #define COM_DLL (COM_BASE + 0x00) /* divisor latch LSB (LCR[7] = 1) */ COM_BASE 60 bsp/drv/dev/serial/ns16550.c #define COM_DLM (COM_BASE + 0x01) /* divisor latch MSB (LCR[7] = 1) */ COM_BASE 42 bsp/hal/ppc/prep/diag.c #define COM_THR (COM_BASE + 0x00) /* transmit holding register */ COM_BASE 43 bsp/hal/ppc/prep/diag.c #define COM_LSR (COM_BASE + 0x05) /* line status register */ COM_BASE 170 bsp/hal/x86/pc/diag.c #define COM_THR (COM_BASE + 0x00) /* transmit holding register */ COM_BASE 171 bsp/hal/x86/pc/diag.c #define COM_LSR (COM_BASE + 0x05) /* line status register */