u                  48 bsp/boot/common/printf.c 	unsigned u;
u                  74 bsp/boot/common/printf.c 				u = va_arg(ap, unsigned);
u                  78 bsp/boot/common/printf.c 						*s++ = digits[u % 10U];
u                  79 bsp/boot/common/printf.c 					while (u /= 10U);
u                  86 bsp/boot/common/printf.c 							*s++ = digits[u % 16U];
u                  87 bsp/boot/common/printf.c 							if ((u /= 16U) == 0)
u                  64 bsp/hal/arm/arch/context.c 	struct cpu_regs *u;
u                  76 bsp/hal/arm/arch/context.c 		u = ctx->uregs;
u                  77 bsp/hal/arm/arch/context.c 		u->r0 = 0;
u                  78 bsp/hal/arm/arch/context.c 		u->r1 = 0x11111111;
u                  79 bsp/hal/arm/arch/context.c 		u->r2 = 0x22222222;
u                  80 bsp/hal/arm/arch/context.c 		u->r3 = 0x33333333;
u                  81 bsp/hal/arm/arch/context.c 		u->svc_sp = (uint32_t)val;
u                  82 bsp/hal/arm/arch/context.c 		u->cpsr = PSR_APP_MODE;	/* FIQ/IRQ is enabled */
u                  98 bsp/hal/arm/arch/context.c 		u = ctx->uregs;
u                  99 bsp/hal/arm/arch/context.c 		u->sp = (uint32_t)val;
u                 104 bsp/hal/arm/arch/context.c 		u = ctx->uregs;
u                 105 bsp/hal/arm/arch/context.c 		u->cpsr = PSR_APP_MODE;	/* FIQ/IRQ is enabled */
u                 106 bsp/hal/arm/arch/context.c 		u->pc = (uint32_t)val;
u                 107 bsp/hal/arm/arch/context.c 		u->lr = 0x12345678;
u                 112 bsp/hal/arm/arch/context.c 		u = ctx->uregs;
u                 113 bsp/hal/arm/arch/context.c 		u->r0 = (uint32_t)val;		/* Argument 1 */
u                  65 bsp/hal/ppc/arch/context.c 	struct cpu_regs *u;
u                  83 bsp/hal/ppc/arch/context.c 		u = ctx->uregs;
u                  84 bsp/hal/ppc/arch/context.c 		u->gr[3] = 0x11111111;
u                  85 bsp/hal/ppc/arch/context.c 		u->gr[4] = 0x22222222;
u                  86 bsp/hal/ppc/arch/context.c 		u->gr[5] = 0x33333333;
u                  87 bsp/hal/ppc/arch/context.c 		u->srr1 = MSR_DFLT;
u                 103 bsp/hal/ppc/arch/context.c 		u = ctx->uregs;
u                 104 bsp/hal/ppc/arch/context.c 		u->gr[1] = (uint32_t)val;
u                 109 bsp/hal/ppc/arch/context.c 		u = ctx->uregs;
u                 110 bsp/hal/ppc/arch/context.c 		u->srr0 = (uint32_t)val;
u                 111 bsp/hal/ppc/arch/context.c 		u->srr1 = MSR_DFLT;
u                 116 bsp/hal/ppc/arch/context.c 		u = ctx->uregs;
u                 117 bsp/hal/ppc/arch/context.c 		u->gr[3] = (uint32_t)val;
u                 118 bsp/hal/ppc/arch/context.c 		argp = (uint32_t *)(u->gr[1] + sizeof(uint32_t));
u                  65 bsp/hal/x86/arch/context.c 	struct cpu_regs *u;
u                  81 bsp/hal/x86/arch/context.c 		u = ctx->uregs;
u                  82 bsp/hal/x86/arch/context.c 		u->eax = 0;
u                  83 bsp/hal/x86/arch/context.c 		u->eflags = (uint32_t)(EFL_IF | EFL_IOPL_KERN);
u                  99 bsp/hal/x86/arch/context.c 		u = ctx->uregs;
u                 100 bsp/hal/x86/arch/context.c 		u->esp = (uint32_t)val;
u                 101 bsp/hal/x86/arch/context.c 		u->ss = (uint32_t)(USER_DS | 3); /* fail safe */
u                 106 bsp/hal/x86/arch/context.c 		u = ctx->uregs;
u                 107 bsp/hal/x86/arch/context.c 		u->eip = (uint32_t)val;
u                 108 bsp/hal/x86/arch/context.c 		u->cs = (uint32_t)(USER_CS | 3);
u                 109 bsp/hal/x86/arch/context.c 		u->ds = u->es = (uint32_t)(USER_DS | 3);
u                 110 bsp/hal/x86/arch/context.c 		u->eflags = (uint32_t)(EFL_IF | EFL_IOPL_KERN);
u                 111 bsp/hal/x86/arch/context.c 		u->eax = u->ebx = u->ecx = u->edx =
u                 112 bsp/hal/x86/arch/context.c 			u->edi = u->esi = u->ebp = 0;
u                 117 bsp/hal/x86/arch/context.c 		u = ctx->uregs;
u                 118 bsp/hal/x86/arch/context.c 		argp = (uint32_t *)(u->esp + sizeof(uint32_t));