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root/bsp/boot/arm/integrator/debug.c

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DEFINITIONS

This source file includes following definitions.
  1. debug_putc
  2. debug_init

   1 /*-
   2  * Copyright (c) 2008-2009, Kohsuke Ohtani
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  * 3. Neither the name of the author nor the names of any co-contributors
  14  *    may be used to endorse or promote products derived from this software
  15  *    without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27  * SUCH DAMAGE.
  28  */
  29 
  30 #include <sys/param.h>
  31 #include <boot.h>
  32 
  33 #define UART_BASE       0x16000000
  34 #define UART_CLK        14745600
  35 #define BAUD_RATE       115200
  36 
  37 /* UART Registers */
  38 #define UART_DR         (*(volatile uint32_t *)(UART_BASE + 0x00))
  39 #define UART_RSR        (*(volatile uint32_t *)(UART_BASE + 0x04))
  40 #define UART_ECR        (*(volatile uint32_t *)(UART_BASE + 0x04))
  41 #define UART_FR         (*(volatile uint32_t *)(UART_BASE + 0x18))
  42 #define UART_IBRD       (*(volatile uint32_t *)(UART_BASE + 0x24))
  43 #define UART_FBRD       (*(volatile uint32_t *)(UART_BASE + 0x28))
  44 #define UART_LCRH       (*(volatile uint32_t *)(UART_BASE + 0x2c))
  45 #define UART_CR         (*(volatile uint32_t *)(UART_BASE + 0x30))
  46 #define UART_IMSC       (*(volatile uint32_t *)(UART_BASE + 0x38))
  47 #define UART_MIS        (*(volatile uint32_t *)(UART_BASE + 0x40))
  48 #define UART_ICR        (*(volatile uint32_t *)(UART_BASE + 0x44))
  49 
  50 /* Flag register */
  51 #define FR_RXFE         0x10    /* Receive FIFO empty */
  52 #define FR_TXFF         0x20    /* Transmit FIFO full */
  53 
  54 /* Masked interrupt status register */
  55 #define MIS_RX          0x10    /* Receive interrupt */
  56 #define MIS_TX          0x20    /* Transmit interrupt */
  57 
  58 /* Interrupt clear register */
  59 #define ICR_RX          0x10    /* Clear receive interrupt */
  60 #define ICR_TX          0x20    /* Clear transmit interrupt */
  61 
  62 /* Line control register (High) */
  63 #define LCRH_WLEN8      0x60    /* 8 bits */
  64 #define LCRH_FEN        0x10    /* Enable FIFO */
  65 
  66 /* Control register */
  67 #define CR_UARTEN       0x0001  /* UART enable */
  68 #define CR_TXE          0x0100  /* Transmit enable */
  69 #define CR_RXE          0x0200  /* Receive enable */
  70 
  71 /* Interrupt mask set/clear register */
  72 #define IMSC_RX         0x10    /* Receive interrupt mask */
  73 #define IMSC_TX         0x20    /* Transmit interrupt mask */
  74 
  75 /*
  76  * Print one chracter
  77  */
  78 void
  79 debug_putc(int c)
  80 {
  81 
  82 #if defined(DEBUG) && defined(CONFIG_DIAG_SERIAL)
  83         while (UART_FR & FR_TXFF)
  84                 ;
  85         UART_DR = c;
  86 #endif
  87 }
  88 
  89 /*
  90  * Initialize debug port.
  91  */
  92 void
  93 debug_init(void)
  94 {
  95 
  96 #if defined(DEBUG) && defined(CONFIG_DIAG_SERIAL)
  97         unsigned int divider;
  98         unsigned int remainder;
  99         unsigned int fraction;
 100 
 101         UART_CR = 0x0;          /* Disable everything */
 102         UART_ICR = 0x07ff;      /* Clear all interrupt status */
 103 
 104         /*
 105          * Set baud rate:
 106          * IBRD = UART_CLK / (16 * BAUD_RATE)
 107          * FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
 108          */
 109         divider = UART_CLK / (16 * BAUD_RATE);
 110         remainder = UART_CLK % (16 * BAUD_RATE);
 111         fraction = (8 * remainder / BAUD_RATE) >> 1;
 112         fraction += (8 * remainder / BAUD_RATE) & 1;
 113         UART_IBRD = divider;
 114         UART_FBRD = fraction;
 115 
 116         UART_LCRH = (LCRH_WLEN8 | LCRH_FEN);    /* N, 8, 1, FIFO enable */
 117         UART_CR = (CR_RXE | CR_TXE | CR_UARTEN);        /* Enable UART */
 118 #endif
 119 }

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