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root/bsp/drv/x86/arch/cpufunc.S

DEFINITIONS

1. breakpoint
2. rdmsr
3. wrmsr
4. cpuid

   1 /*-
   2  * Copyright (c) 2008, Kohsuke Ohtani
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  * 3. Neither the name of the author nor the names of any co-contributors
  14  *    may be used to endorse or promote products derived from this software
  15  *    without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27  * SUCH DAMAGE.
  28  */
  30 #include <machine/asm.h>
ENTRY(breakpoint)
  34         int     $3
  35         ret
ENTRY(rdmsr)
  38         movl    4(%esp), %ecx
  39         rdmsr
  40         movl    8(%esp), %ecx
  41         movl    %eax, (%ecx)
  42         movl    12(%esp), %ecx
  43         movl    %edx, (%ecx)
  44         ret
ENTRY(wrmsr)
  47         movl    4(%esp), %ecx
  48         movl    8(%esp), %eax
  49         movl    12(%esp), %edx
  50         wrmsr
  51         ret
ENTRY(cpuid)
  54         pushl   %ebx
  55         pushl   %edi
  56         movl    12(%esp), %eax
  57         movl    16(%esp), %edi
  58         cpuid
  59         movl    %eax, 0(%edi)
  60         movl    %ebx, 4(%edi)
  61         movl    %ecx, 8(%edi)
  62         movl    %edx, 12(%edi)
  63         popl    %edi
  64         popl    %ebx
  65         ret